A quad-band Global System for Mobile Communication/General Packet Radio Services (GSM/GPRS) RF transceiver supports relatively high and diverse carrier frequencies of 800 MHz, 900 MHz, 1800 MHz and 1900 MHz used in different regions of the world. A voltage controlled oscillator (VCO) of a PLL in such a transceiver correspondingly has a wide frequency range (e.g., from 3 GHz to 4 GHz). Such a wide frequency range at a high frequency must also be covered by a frequency divider, which is right next to a VCO buffer and receives the output of the VCO buffer as its input.
In a frequency divider for an input signal having a relatively high frequency, relatively large current and small load resistor are typically used to guarantee the speed requirement and output DC level. In a frequency divider for an input signal having a relatively low frequency, relatively small current and large load resistor are typically used to save current and provide correct DC level for the following stage. Hence, a conventional high or low frequency divider is generally not suitable for operation over a wide frequency range.
Therefore, it is desirable to provide a high frequency divider that can operate at both the high and low ends of a wide frequency range of a VCO.